Acronym for complementary metal oxide semiconductor. A family of logic circuits that uses pairs of complementary MOSFETs, i.e. PMOS plus NMOS, to implement the basic logic functions. The complementary transistors are arranged so that there is no direct current flow through each pair of PMOS and NMOS. In the circuit of the CMOS inverter (see diagram), the PMOS conducts when the input is logic 0 and the NMOS conducts (to ground) when the input is logic 1.
By scaling down the dimensions of the MOS devices, higher switching speeds and larger packing densities are possible; these devices are often termed HMOS. The term is used colloquially to refer to the nonvolatile RAM used in most computer systems to store parameters needed at start-up, such as passwords, types of disk present, language requirements, etc.
CMOS. CMOS inverter.