A technique used for the design of integrated circuits that involves the manipulation of circuit designs at the semiconductor device level. If the device is based on silicon technology for instance, the designer will be concerned with the definition and characterization of silicon structures that will form the elementary components of the IC. The geometric shapes of these components are laid out with a polygon editor on a CAD (computer-aided design) system. The shapes thus produced may be combined with others from a standard cell library to form the overall geometric design of the IC. Electric characteristics appropriate for the semiconductor materials that will be used to fabricate the IC are then associated with this geometric definition so that electric simulation of the behavior of the IC can be carried out. The geometric definition forms the basis of the masks that will be used for fabrication of the device by a process of photolithography. See also semicustom.