Overview

memory guard


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Quick Reference

A form of hardware interlock used in some systems to control access to memory that is currently involved in a peripheral transfer. At the time of initiating the transfer the channel sets an indication that the buffer area is associated with the transfer; this indication is cleared by the channel on completion of the transfer. Any attempt to access the buffer area (other than by the channel) will suspend the process attempting to access the buffer until the transfer has been completed.

Subjects: Computing.


Reference entries

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