A system in which a process's workspace is held partly in high-speed memory and partly on some slower, and cheaper, backing-store device. When the process refers to a memory location the system hardware detects whether or not the required location is physically present in memory, and generates an interrupt if it is not; this allows the system supervisor to transfer the required data area from backing store into memory. For this purpose the address space is subdivided into pages typically holding 4 kilobytes of data. Addresses within a page are defined by the 12 low-order bits in the address. The high-order bits can be thought of as the page number; they are used to search an associative memory that shows either the physical location within memory of word zero of the page, or indicates that the page is not present in memory — at which point an interrupt is generated. The system supervisor then locates the page on backing store and transfers it into memory, updating the associative memory as it does so.